Shown on this slide are the hardware pins on the RX that drive the external buses. The data bus can be up to a full 32-bits wide, or the width  can be limited to 8- or 16-bits to reclaim some I/O pins by setting the port function control registers. Up to twenty four address lines cover the entire 16Mb range of each chip select, and here too the number of address lines used can be limited if the external device does not require all 16Mb. Note that the number of bits on the data and address buses available to the application might be limited based on the package used in the design. In addition to the buses, there are the individual chip select lines that go active when memory in their range is accessed. The remaining pins are the control signals. There are two modes of control operation; single write strobe control and byte strobe control. Both modes use a common read signal. In single write strobe control, there is a common write signal and four byte strobe lines, BC0 through BC3, that indicate which bits of the data bus are valid. In byte strobe control, four independent write signals are used instead. Finally, if the software configurable timing is not sufficient, each chip select can also be set to use a hardware wait signal.