Before beginning an in depth discussion of the RX Bus State Controller, the presentation will review the RX memory map, which is shown on this slide. The RX is a 32-bit device with a full 4Gb address space. The address map is divided into internal and external address spaces. Included in the internal address space are all on-chip resources including on-chip program flash, on-chip RAM, data flash, all the I/O registers used to access the RX peripherals, plus some reserved areas that are inaccessible to the user. There are also two areas reserved for external memory access: an area mapped to seven programmable chip select lines, with each chip select assigned a 16Mb window and a 128Mb area assigned to the SDRAM controller. Not covered in this presentation is an eighth chip select area for CS0 that overlaps with the top of memory where the on-chip program flash resides and that can only be used when the on-chip flash is disabled.