In summary, the memory map of the RX BSC consists of on-chip resources and an external memory area. The on-chip resources include flash ROM, RAM, data flash, peripheral I/O registers and reserved areas. Included in the external memory are chip select areas and SDRAM area. There are eight  16-Mb external chip selects, CS0-CS7, with CS0 being reserved for special applications. The SDRAM controller has a dedicated area in memory, similar to the external chip selects. It occupies a 128Mb area in the RX memory map and implements an industry standard SDRAM interface. Every memory access is checked by the RX bus error monitoring system to verify access to valid memory areas in the RX memory map. An interrupt is generated when errors, such as an illegal address or bus timeout, are detected and status registers then are used to determine which bus master created the fault, and the memory address that was accessed.