Shown on this slide is the block diagram of the superset Concerto™ MCU showing that the device is partitioned into two separate subsystems, one for real-time control and one for host communications. On the control side is the C28x core with floating point providing the control-oriented peripherals required to execute complex algorithms for precise, efficient power conversion; the essence of efficient motor control, renewable energy and smart grid technologies. The host subsystem is based on the Cortex™-M3, and features advanced connectivity peripherals for communications, including Ethernet, USB On-The-Go, dual CAN, and multiple serial communication ports. It can be seen that both subsystems have up to 512 kB of dedicated flash memory so that developers can execute code separately with each core in order to maximize performance of each subsystem. Additionally, it allows multiple developers to “own” their own flash. In some cases, customers will have separate software engineering teams to handle either the control or host side, separate flash banks allow engineers to focus on their side and not be concerned with the amount of flash required by the other team. Concerto also includes up to 64 kB of shared RAM which gives developers the flexibility to partition it to either subsystem depending on the design needs. Customers whose requirements are mostly on the control side will likely choose to partition the RAM to the C28x core, while customers requiring more communication can choose to dedicate more RAM to the Cortex-M3 side. Concerto also includes shared analog because safety is becoming more important in green applications, and this configuration allows each core to check inputs from the ADC. There are no special power and clocking requirements for Concerto; it is as user friendly as the Piccolo power and clocking scheme. Concerto offers the same conveniences such as an single rail supply with an internal voltage regulator, internal oscillator, and clock fail detector.