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DAC2-Slide10

The PWM14 Control register will be the next topic covered. First, note that with the exception of the Output Enable (OE) bits, the control bits affect both channels in a pair. For example, even though the customer writes the driver to support a PWM Enable call for each channel, if the PWM is stopped by clearing the PWME, both channels will stop. The CKS and OS values must be the same for both channels in a pair. This means that if the application absolutely must run two PWM channels with different values, then a device like the H8S/2633 MCU must be used, which has two pairs of PWM D/As (4 channels, total). Use one PWM output from each pair so that the CKS and OS can differ. After a Reset or when the MCU goes into Hardware Standby mode, the PWM Control register is reset to the default values. If users utilize the Module Stop mode, they must re-initialize the channels. Also, be sure not to use the Test bit in normal operation; doing so will cause abnormal PWM operation. Most of the bits in the Control register are relatively straightforward, but the OS bit should be explained in more detail because it impacts the driver code.  First, though, a caution: do not set this bit if the pin is being used as a GPIO. The OS bit determines which part of the waveform that is being summed up. However, it is somewhat counter-intuitive. When this bit is inverted (i.e., OS = 1), users are totaling the high part of the waveform. This means that the analog output will have a linear relationship to the value written into the data register. To put it another way, when OS = 1, increasing the value in the data register increases the analog output.

PTM Published on: 2010-12-01