Again, a dominant value (CAN_TX= logic low) is created by driving C_HI high and C_LO low to create a positive differential voltage between them. A recessive state (CAN_TX= logic high) is created by having all nodes put the C_HI and the C_LO lines in the high-impedence state, so the differetial voltage is zero because no current flows in the bus termination resistors. Receivers at bus nodes detect a dominant state when a differential voltage greater than 900mV exists between C_HI and C-LO. They detect a recessive state when the differential voltage is less than 500mV. There are three things to note with regard to this scope photo. First, the MCU transmit pin runs at standard logic levels. Second, there is a 2.5V offset on the transceiver output to the bus. This is compliant with the ISO11898-2 standard, which allows a common-mode range of -7V to +12V. And third, CAN uses a non-return-to-zero (NRZ) serial data transmission method.