The Cortex™-M4 core has an IEEE 754 compliant single-precision floating-point unit (FPU) with Single Instruction Multiple Data (SIMD) for 16-bit data types along with a 32 x 32 multiply accumulate (MAC) with 64-bit result. The processor delivers exceptional power efficiency through an efficient instruction set, thanks to its extensively optimized design. The Floating point core supports hardware division, multiplication, addition, etc. Although it can not replace a DSP, it can be used in simple signal processing applications using the DSP-like instruction set. Higher precision in control loops, faster signal processing, lower latency and easier integration with tools such as MATLAB and LABView are some of the advantages of using TM4C123x family of MCUs. The Cortex-M4F floating point instruction set does not support all operations defined in the IEEE 754-2008 standard. Unsupported operations include, but are not limited to the following: remainder, round floating-point number to integer-valued floating-point number, binary-to-decimal conversions, decimal-to-binary conversions, and direct comparison of single-precision and double-precision values. The Cortex-M4 FPU supports fused MAC operations as described in the IEEE standard. For complete implementation of the IEEE 754-2008 standard, floating-point functionality must be augmented with library functions.