Intel's MAX 10 FPGAs deliver advanced processing capabilities in a low-cost, single-chip, small-form-factor programmable logic device. The MAX 10 FPGA family encompasses both small packaging and high-I/O pin-count packages with densities ranging from 2,000 to 50,000 logic elements.
Product Training Module: Max® 10 FPGAs
- Dual-configuration: MAX 10 FPGAs provide a single-on-die Flash memory that supports dual-configuration, for true fail-safe upgrades.
- Analog Blocks: Integrated analog blocks feature a temperature-sensing diode and an analog-to-digital converter (ADC). The ADC is a 12-bit resolution successive approximation register (SAR) ADC, with up to 18-analog inputs and 1 Msps sampling.
- Instant-on: MAX 10 FPGAs can be the first usable device on a system board to control bring-up of high-density FPGAs, ASICs, ASSPs, and processors.
- DSP blocks: As a non-volatile FPGA with DSP, MAX 10 FPGAs are ideal for high-performance, high-precision DSP applications.
- Up to 50,000 logic elements (LEs)
- Maximum of 500 user I/O pins
- Non-volatile instant-on architecture
- Embedded SRAM
- High-performance phase-locked loops (PLLs)
- External memory interface (DDR3 SDRAM/DDR3L SDRAM/DDR2 SDRAM/LPDDR2)
- Nios II embedded processor support
- DSP blocks
- 3.3 V, LVDS, PCI™, and 30+ other I/O standards supported
- Single- or dual-core voltage supply offering
- Embedded ADCs - 12-bit 1 Msps
- Up to 18 analog input channels
- Temperature sensor
- Embedded Flash
- Dual-configuration Flash
- User Flash memory
- Internal oscillator
- Power saving features
- Sleep mode to reduce dynamic power by up to 95%
- Input buffer power-down
- 128 bit Advanced Encryption Standard (AES) design security
- RoHS6 packaging
MAX® 10 FPGA Evaluation Kit
The 10M08 evaluation board will enable a cost-effective entry point to MAX 10 FPGA design. The card comes with Arduino UNO R3 header socket to allow a wide-variety of daughter cards to be connected (programming download cable is sold separately)
- 10M08SAE144C8G FPGA
- Arduino Headers
- Access to over 80 I/O through-hole via’s