NTGS3441P Datasheet by onsemi

3 ON Semiconductor®
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 0 1Publication Order Number:
NTGS3441P/D
NTGS3441P
Power MOSFET
−20 V, −3.16 A, Single P−Channel TSOP−6
Features
•Ultra Low RDS(on) to Improve Conduction Loss
•Low Gate Charge to Improve Switching Losses
•TSOP−6 Surface Mount Package
•This is a Pb−Free Device
Applications
•High Side Switch in DC−DC Converters
•Battery Management
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS −20 V
Gate−to−Source Voltage VGS ±12 V
Continuous Drain
Current (Note 1) Steady
State TA = 25°CID−2.5 A
TA = 85°C −1.8
t = 10 s TA = 25°C −3.16
Power Dissipation
(Note 1) Steady
State TA = 25°C PD0.98 W
t = 10 s 1.60
Continuous Drain
Current (Note 2) Steady
State TA = 25°C ID−1.8 A
TA = 85°C −1.3
Power Dissipation
(Note 2) TA = 25°C PD0.51 W
Pulsed Drain Current tp = 10 msIDM −13 A
Operating Junction and Storage Temperature TJ,
TSTG
−55 to
150
°C
Source Current (Body Diode) IS−1.5 A
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s) TL260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in
sq [1 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.0751 in sq)
3
4
1256
Device Package Shipping†
ORDERING INFORMATION
P−Channel
TSOP−6
CASE 318G
STYLE 1
MARKING
DIAGRAM
S3 MG
G
PT = Device Code
M = Date Code
G= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
321
4
GateDrain
Source
56
Drain
DrainDrain
NTGS3441PT1G TSOP−6
(Pb−Free) 3000 / Tape & Ree
l
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
11
V(BR)DSS RDS(ON) TYP ID MAX
−20 V
91 mW @ 4.5 V
−3.16 A144 mW @ 2.7 V
http://onsemi.com
188 mW @ 2.5 V
NTGS3441P
http://onsemi.com
2
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Ambient – Steady State (Note 3) RqJA 128 °C/W
Junction−to−Ambient – t = 10 s (Note 3) RqJA 78
Junction−to−Ambient – Steady State (Note 4) RqJA 244
3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces)
4. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = TBD in sq)
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = −250 mA−20 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient V(BR)DSS/TJ16 mV/ °C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = −20 V
TJ = 25°C −1 mA
TJ = 125°C −10
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±12 V±100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 mA0.6 1.6 V
Negative Threshold Temperature Coefficient VGS(TH)/TJ3.2 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 4.5 V, ID = −3.0 A 91 110 mW
VGS = 2.7 V, ID = −1.5 A 144 165
VGS = 2.5 V, ID = −1.5 A 188
Forward Transconductance gFS VDS = −15 V, ID =−1.5 A 4.0 S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance CISS
VGS = 0 V, f = 1 MHz, VDS = −15 V
345 pF
Output Capacitance COSS 150
Reverse Transfer Capacitance CRSS 40
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = −10 V; ID = −3.0 A
3.25 6.0 nC
Threshold Gate Charge QG(TH) 0.3
Gate−to−Source Charge QGS 0.6
Gate−to−Drain Charge QGD 1.4
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time td(ON)
VGS = 4.5 V, VDD = −10 V,
ID = −1.5 A, RG = 4.7 W
7.0 12 ns
Rise Time Tr14 25
Turn−Off Delay Time td(OFF) 13 25
Fall Time Tf4.0 8.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = −3.0 A TJ = 25°C 0.8 1.2 V
TJ = 125°C 0.7
Reverse Recovery Time tRR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = −3.0 A
25 ns
Charge Time Ta10
Discharge Time Tb15
Reverse Recovery Charge QRR 15 nC
5. Switching characteristics are independent of operating junction temperatures
6. Pulse Test: pulse width = 300 ms, duty cycle = 2%
vasymvminv
NTGS3441P
http://onsemi.com
3
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
0
20
8
16
12
1064
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
−ID, DRAIN CURRENT (AMPS)
8
4
02
Figure 1. On−Region Characteristics
1
20
16
32
12
8
4
045
Figure 2. Transfer Characteristics
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
25
0.12
47
0.18
0.06 8
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
0.5 8.5
0.27
9.57.56.5
0.24
0.21
0.18
0.15
5.5
0.09
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
−ID, DRAIN CURRENT (AMPS)
−50 0−25 25
1.4
1.2
1
0.8
0.7 50 125100
Figure 5. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
TJ = 25°C
VGS = −10 V to −4.5 V
−4 V
−3.5 V
−2 V
−2.5 V
−3 V
−1.9 V
0.24
36
TJ = 25°C
TJ = 100°C
TJ = −55°C
ID = −1.5 A
TJ = 25°C
VDS ≥ −10 V
0.30
0.06
75 150
TJ = 25°C
VGS = −2.5 V
VGS = −4.5 V
ID = −1.5 A
VGS = −4.5 V
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
015
12010
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
−IDSS, LEAKAGE (nA)
100
1000
10
5
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ = 125°C
TJ = 100°C
VGS = 0 V
19753
1
0.12
4.53.52.51.5
1.5
1.3
1.1
0.9
h mom
NTGS3441P
http://onsemi.com
4
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
8124016
600
400
200
020
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
C, CAPACITANCE (pF)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 9. Gate Threshold Voltage Variation
with Temperature
0.4
10
10.8
8
6
4
2
0.6
01.2
Figure 10. Diode Forward Voltage vs. Current
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
−IS, SOURCE CURRENT (AMPS)
TJ = 25°C
VGS = 0 V
Coss
Ciss
Crss
VGS = 0 V
TJ = 25°C
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0
3
0
QG, TOTAL GATE CHARGE (nC)
5
4
1.5 3
ID = −3.0 A
TJ = 25°C
VGS
QGS QGD
QT
2
1
2.5
8
0
20
12
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
VDS
16
3.521
RG, GATE RESISTANCE (OHMS)
1 10 100
1
t, TIME (ns)
100
tr
td(off)
td(on)
tf
10
VDD = −10 V
ID = −1.5 A
VGS = −4.5 V
0.5
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TSOP−6
CASE 318G−02
ISSUE V
DATE 12 JUN 2012
SCALE 2:1
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
23
456
D
1
e
b
E1
A1
A
0.05
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
c
STYLE 2:
PIN 1. EMITTER 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. BASE 2
6. COLLECTOR 2
STYLE 3:
PIN 1. ENABLE
2. N/C
3. R BOOST
4. Vz
5. V in
6. V out
STYLE 4:
PIN 1. N/C
2. V in
3. NOT USED
4. GROUND
5. ENABLE
6. LOAD
XXX MG
G
XXX = Specific Device Code
A =Assembly Location
Y = Year
W = Work Week
G= Pb−Free Package
STYLE 5:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 6:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 7:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. N/C
5. COLLECTOR
6. EMITTER
STYLE 8:
PIN 1. Vbus
2. D(in)
3. D(in)+
4. D(out)+
5. D(out)
6. GND
GENERIC
MARKING DIAGRAM*
STYLE 9:
PIN 1. LOW VOLTAGE GATE
2. DRAIN
3. SOURCE
4. DRAIN
5. DRAIN
6. HIGH VOLTAGE GATE
STYLE 10:
PIN 1. D(OUT)+
2. GND
3. D(OUT)−
4. D(IN)−
5. VBUS
6. D(IN)+
1
1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
STYLE 11:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1/GATE 2
STYLE 12:
PIN 1. I/O
2. GROUND
3. I/O
4. I/O
5. VCC
6. I/O
*This information is generic. Please refer to device data sheet
for actual part marking. Pb−Free indicator, “G” or microdot “
G”, may or may not be present.
XXXAYWG
G
1
STANDARDIC
XXX = Specific Device Code
M = Date Code
G= Pb−Free Package
DIM
A
MIN NOM MAX
MILLIMETERS
0.90 1.00 1.10
A1 0.01 0.06 0.10
b0.25 0.38 0.50
c0.10 0.18 0.26
D2.90 3.00 3.10
E2.50 2.75 3.00
e0.85 0.95 1.05
L0.20 0.40 0.60
0.25 BSC
L2
−
0°10°
STYLE 13:
PIN 1. GATE 1
2. SOURCE 2
3. GATE 2
4. DRAIN 2
5. SOURCE 1
6. DRAIN 1
STYLE 14:
PIN 1. ANODE
2. SOURCE
3. GATE
4. CATHODE/DRAIN
5. CATHODE/DRAIN
6. CATHODE/DRAIN
STYLE 15:
PIN 1. ANODE
2. SOURCE
3. GATE
4. DRAIN
5. N/C
6. CATHODE
1.30 1.50 1.70
E1
E
RECOMMENDED
NOTE 5
L
C
M
H
L2
SEATING
PLANE
GAUGE
PLANE
DETAIL Z
DETAIL Z
0.60
6X
3.20 0.95
6X
0.95
PITCH
DIMENSIONS: MILLIMETERS
M
STYLE 16:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 17:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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