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Copyright © Infineon Technologies AG 2021. All rights reserved.restricted2021-07-01
NOR Flash Memory Family Decoder
S25 H S 512 T
Technology: J = 110-nm Floating Gate (FG) N = 110-nm MIRRORBIT™ (MB)
K = 90-nm FG P = 90-nm MB
L = 65-nm FG R, S = 65-nm MB
T = 45-nm MB
Density: 008 = 8Mb 064 = 64Mb 512 = 512Mb 04G = 4Gb
016 = 16Mb 128 = 128Mb 01G = 1Gb
032 = 32Mb 256 = 256Mb 02G = 2Gb
Voltage: D = 2.5 V L = 3.0 V S = 1.8 V
Family: A = Standard ADP (Address-Data Parallel)
C = Burst Mode ADP (Address-Data Parallel)
F = Serial
G = Page Mode
H = High-Performance Serial
J = Simultaneous Read/Write ADP (Address-Data Parallel)
K = HYPERBUS™
P = Page Mode Simultaneous Read/Write ADP (Address-Data Parallel)
V = Burst Mode Simultaneous Read/Write ADM (Address-Data Multiplexed)
X = Burst Mode Simultaneous Read/Write AADM (Address-Address-Data Multiplexed)
Series: 25 = SPI 26 = HYPERBUS™ 28 = Octal
35 = SPI with Security 36 = HYPERBUS™ with Security 38 = Octal with Security
29 = Parallel 70 = Stacked Die 79 = Dual Quad SPI
Prefix: S