SN54HC08, SN74HC08 Datasheet by Texas Instruments

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intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
SNx4HC08 Quadruple 2-Input Positive-AND Gates
1
1 Features
1• Wide Operating Voltage Range of 2 V to 6 V
• Outputs Can Drive up to 10 LSTTL Loads
• Low Power Consumption: Maximum ICC 20 µA
• Typical tpd =8nsat6V
• ±4-mA Output Drive at 5 V
• Low Input Current of 1 µA (Maximum)
2 Applications
• Servers
• LED Displays
• Network Switches
• I/O Expanders
• Base Station Processor Boards
3 Description
The SNx4HC08 devices contain four independent
2‑input AND gates. They perform the Boolean
function Y = A ●B or Y = A + B in positive logic.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN74HC08D SOIC (14) 8.65 mm × 3.90 mm
SN74HC08DB SSOP (14) 6.30 mm × 5.30 mm
SN74HC08N PDIP (14) 19.34 mm × 6.35 mm
SN74HC08NS SO (14) 10.30 mm × 5.30 mm
SN74HC08PW TSSOP (14) 5.00 mm × 4.40 mm
SN54HC08
LCCC (20) 1.83 mm × 8.89 mm
CDIP (14) 19.56 mm × 6.67 mm
CFP (14) 9.21 mm × 5.97 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Diagram
l TEXAS INSTRUMENTS
2
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics: SN54HC08 ...................... 5
6.6 Electrical Characteristics: SN74HC08 ...................... 6
6.7 Switching Characteristics: SN54HC08...................... 6
6.8 Switching Characteristics: SN74HC08...................... 7
6.9 Operating Characteristics.......................................... 7
6.10 Typical Characteristics............................................ 7
7 Parameter Measurement Information .................. 8
8 Detailed Description.............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes.......................................... 9
9 Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application .................................................. 10
10 Power Supply Recommendations ..................... 11
11 Layout................................................................... 11
11.1 Layout Guidelines ................................................. 11
11.2 Layout Example .................................................... 11
12 Device and Documentation Support ................. 12
12.1 Documentation Support ........................................ 12
12.2 Related Links ........................................................ 12
12.3 Community Resource............................................ 12
12.4 Trademarks........................................................... 12
12.5 Electrostatic Discharge Caution............................ 12
12.6 Glossary................................................................ 12
13 Mechanical, Packaging, and Orderable
Information ........................................................... 12
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (January 2007) to Revision G Page
• Added ESD Ratings table,Feature Descriptionsection, Device Functional Modes,Application and Implementation
section, Power Supply Recommendationssection, Layoutsection, Device and Documentation Support section,
andMechanical, Packaging, and Orderable Information section............................................................................................ 1
• Removed Ordering Information table, see POA at the end of the datasheet......................................................................... 1
• Added ESD warning ............................................................................................................................................................... 4
• Split Electrical Characteristics and Switching Characteristics tables into separate tables for the SN54HC08 and
SN74HC08 parts..................................................................................................................................................................... 5
l TEXAS INSTRUMENTS N01 to Scale
Not to scale
41Y
5NC
62A
7NC
82B
92Y
10GND
11NC
123Y
133A
14 3B
15 NC
16 4Y
17 NC
18 4A
19 4B
20 VCC
1 NC
2 1A
3 1B
Not to scale
11A 14 VCC
21B 13 4B
31Y 12 4A
42A 11 4Y
52B 10 3B
62Y 9 3A
7GND 8 3Y
3
SN54HC08
,
SN74HC08
www.ti.com
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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5 Pin Configuration and Functions
SN54HC08: J, W; SN74HC08: D, DB, N, NS, and PW Packages
14-Pin CDIP, CFP, SOIC, SSOP, PDIP, SO, and TSSOP
Top View
SN54HC08 FK Package
20-Pin LCCC
Top View
Pin Functions
PIN
I/O DESCRIPTION
NAME CDIP, CFP, SOIC, SSOP,
PDIP, SO, and TSSOP LCCC
1A 1 2 I Input 1
1B 2 3 I Input 1
1Y 3 4 O Output 1
2A 4 6 I Input 2
2B 5 8 I Input 2
2Y 6 9 O Output 2
3A 9 13 I Input 3
3B 10 14 I Input 3
3Y 8 12 O Output 3
4A 12 18 I Input 4
4B 13 19 I Input 4
4Y 11 16 O Output 4
GND 7 10 — Ground Pin
VCC 14 20 — Power Pin
NC — 1, 5, 7, 11,
15, 17 — No internal connection
l TEXAS INSTRUMENTS
4
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage –0.5 7 V
Input clamp current(2), IIK VI< 0 or VI> VCC ±20 mA
Output clamp current(2), IOK VO< 0 ±20 mA
Continuous output current, IOVO= 0 to VCC ±25 mA
Continuous current through VCC or GND, ICC ±50 mA
Junction temperature, TJ150 °C
Storage temperature, Tstg –60 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
SN74HC08 in D, DB, N, NS, or PW
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating
CMOS Inputs,SCBA004.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
VCC Supply voltage 2 5 6 V
VIH High-level input voltage
VCC = 2 V 1.5
VVCC = 4.5 V 3.15
VCC = 6 V 4.2
VIL Low-level input voltage
VCC = 2 V 0.5
VVCC = 4.5 V 1.35
VCC = 6 V 1.8
VIInput voltage 0 VCC V
VOOutput voltage 0 VCC V
Δt/Δv Input transition rise and fall rate
VCC = 2 V 1000
ns/VVCC = 4.5 V 500
VCC = 6 V 400
TAOperating free-air temperature SN54HC08 –55 125 °C
SN74HC08 –40 85
l TEXAS INSTRUMENTS
5
SN54HC08
,
SN74HC08
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SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.4 Thermal Information
THERMAL METRIC(1)
SN74HC08
UNIT
D
(SOIC) DB
(SSOP) N
(CFP) NS
(SO) PW
(TSSOP)
14 PINS 14 PINS 14 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 92.5 106.8 56.5 89.9 121.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 52.4 58.8 43.7 47.7 49.8 °C/W
RθJB Junction-to-board thermal resistance 46.7 54.2 36.3 48.7 62.9 °C/W
ψJT Junction-to-top characterization parameter 19.4 23.8 28.4 17.6 6 °C/W
ψJB Junction-to-board characterization parameter 46.5 53.7 36.2 48.4 62.3 °C/W
6.5 Electrical Characteristics: SN54HC08
TA= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage VI= VIH or VIL
IOH = –20 µA
VCC = 2 V 1.9 1.998
V
VCC = 4.5 V 4.4 4.499
VCC = 6 V 5.9 5.999
IOH = –4 mA,
VCC = 4.5 V
TA= 25°C 3.98 4.3
TA= –55°C to 125°C 3.7
IOH = –5.2 mA,
VCC = 6 V
TA= 25°C 5.48 5.8
TA= –55°C to 125°C 5.2
VOL Low-level output voltage VI= VIH or VIL
IOL = 20 µA
VCC = 2 V 0.002 0.1
V
VCC = 4.5 V 0.001 0.1
VCC = 6 V 0.001 0.1
IOL = 4 mA,
VCC = 4.5 V
TA= 25°C 0.17 0.26
TA= –55°C to 125°C 0.4
IOL = 5.2 mA,
VCC = 6 V
TA= 25°C 0.15 0.26
TA= –55°C to 125°C 0.4
IIInput current VI= VCC or 0, VCC = 6 V TA= 25°C ±0.1 ±100 nA
TA= –55°C to 125°C ±1000
ICC Quiescent current VI= VCC or 0, IO= 0, VCC = 6 V TA= 25°C 2 µA
TA= –55°C to 125°C 40
CiInput capacitance VCC = 2 V to 6 V 3 10 pF
l TEXAS INSTRUMENTS
6
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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6.6 Electrical Characteristics: SN74HC08
TA= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage VI= VIH or VIL
IOH = –20 µA
VCC = 2 V 1.9 1.998
V
VCC = 4.5 V 4.4 4.499
VCC = 6 V 5.9 5.999
IOH = –4 mA,
VCC = 4.5 V
TA= 25°C 3.98 4.3
TA= –55°C to 125°C 3.84
IOH = –5.2 mA,
VCC = 6 V
TA= 25°C 5.48 5.8
TA= –55°C to 125°C 5.34
VOL Low-level output voltage VI= VIH or VIL
IOL = 20 µA
VCC = 2 V 0.002 0.1
V
VCC = 4.5 V 0.001 0.1
VCC = 6 V 0.001 0.1
IOL = 4 mA,
VCC = 4.5 V
TA= 25°C 0.17 0.26
TA= –55°C to 125°C 0.33
IOL = 5.2 mA,
VCC = 6 V
TA= 25°C 0.15 0.26
TA= –55°C to 125°C 0.33
IIInput current VI= VCC or 0, VCC = 6 V TA= 25°C ±0.1 ±100 nA
TA= –55°C to 125°C ±1000
ICC Quiescent current VI= VCC or 0, IO= 0, VCC = 6 V TA= 25°C 2 µA
TA= –55°C to 125°C 20
CiInput capacitance VCC = 2 V to 6 V 3 10 pF
6.7 Switching Characteristics: SN54HC08
over operating free-air temperature range (unless otherwise noted)
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
tpd Propagation delay A Y
VCC = 2 V TA= 25°C 50 100
ns
TA= –55°C to 125°C 150
VCC = 4.5 V TA= 25°C 10 20
TA= –55°C to 125°C 30
VCC = 6 V TA= 25°C 8 17
TA= –55°C to 125°C 25
ttTransition time Y
VCC = 2 V TA= 25°C 38 75
ns
TA= –55°C to 125°C 110
VCC = 4.5 V TA= 25°C 8 15
TA= –55°C to 125°C 22
VCC = 6 V TA= 25°C 6 13
TA= –55°C to 125°C 19
l TEXAS INSTRUMENTS cc
C001
7
SN54HC08
,
SN74HC08
www.ti.com
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
Product Folder Links: SN54HC08 SN74HC08
Submit Documentation FeedbackCopyright © 1982–2016, Texas Instruments Incorporated
6.8 Switching Characteristics: SN74HC08
over operating free-air temperature range (unless otherwise noted)
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
tpd Propagation delay A Y
VCC = 2 V TA= 25°C 50 100
ns
TA= –55°C to 125°C 125
VCC = 4.5 V TA= 25°C 10 20
TA= –55°C to 125°C 25
VCC = 6 V TA= 25°C 8 17
TA= –55°C to 125°C 24
ttTransition time Y
VCC = 2 V TA= 25°C 38 75
ns
TA= –55°C to 125°C 95
VCC = 4.5 V TA= 25°C 8 15
TA= –55°C to 125°C 19
VCC = 6 V TA= 25°C 6 13
TA= –55°C to 125°C 16
6.9 Operating Characteristics
TA= 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance per inverter No load 20 pF
6.10 Typical Characteristics
Figure 1. Propagation Delay vs VCC
l TEXAS INSTRUMENTS INPuT RISE AND FALL TIMES PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
From Output
Under Test
C = 50 pF
(see Note A)
L
LOAD CIRCUIT
Test
Point
VOLTAGE WAVEFORMS
INPUT RISE AND FALL TIMES
Input 90%
90%
50% 50%
10% 10%
tf
tr
0 V
VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
tPLH
tPLH
tPHL
tPHL
Input
In-Phase
Output
Out-of-Phase
Output
90%
90%
90%
50%
10% 10%
10%
50%
50%
50%
50%
tf
tf
tr
90%
10%
50%
tr
VCC
VOL
VOH
VOH
0 V
VOL
8
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
www.ti.com
Product Folder Links: SN54HC08 SN74HC08
Submit Documentation Feedback Copyright © 1982–2016, Texas Instruments Incorporated
7 Parameter Measurement Information
A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having
the following characteristics: PRR ≤1 MHz, ZO= 50 Ω, tr= 6 ns, tf= 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 2. Load Circuit and Voltage Waveforms
l TEXAS INSTRUMENTS ed
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BY
Copyright © 2016, Texas Instruments Incorporated
9
SN54HC08
,
SN74HC08
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SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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8 Detailed Description
8.1 Overview
The SNx4HC08 contains quadruple 2-input positive AND gate device and performs the Boolean function
Y=A●B. This device is useful when multiple AND functions are used in the system.
8.2 Functional Block Diagram
Figure 3. Logic Diagram (Positive Logic)
8.3 Feature Description
The device can operate from 2 V to 6 V, allowing a wide operating voltage.
The device has low power consumption (20-µA maximum ICC).
8.4 Device Functional Modes
Table 1 lists the functional modes for the SN54HC08 and SN74HC08 devices.
Table 1. Function Table (Each Inverter)
INPUTS OUTPUT
A B Y
HHH
L X L
X L L
l TEXAS INSTRUMENTS 5 7v Bus Dnver V06 5 V Regwated 01% T ) 57v Accessory
Copyright © 2016, Texas Instruments Incorporated
10
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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Product Folder Links: SN54HC08 SN74HC08
Submit Documentation Feedback Copyright © 1982–2016, Texas Instruments Incorporated
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SNx4HC08 is used to drive CMOS device and used for implementing AND logic. The HC family is low power
with the SNx4HC08 having 20-µA maximum supply current. The supply for SN74HC08 is wide, accepting 2-V to
6-V VCC. This device can be used for a multitude of bus-interface type applications where output ringing is a
concern.
9.2 Typical Application
Figure 4. Typical Application Diagram
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it
can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so
consider routing and load conditions to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended input conditions
– Rise time and fall time specs: See (Δt/ΔV) in Recommended Operating Conditions.
– Specified high and low levels: See (VIH and VIL)inRecommended Operating Conditions.
2. Absolute Maximum Output Conditions
– Load currents must not exceed 25 mA per output and 50 mA total for the part
– Outputs must not be pulled above VCC
l TEXAS INSTRUMENTS
Vcc
Unused Input
Input
Output
Input
Unused Input Output
0
10
20
30
40
2 3 4 5 6
tt (ns)
VCC (V)
CL=50pF
C002
11
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,
SN74HC08
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Typical Application (continued)
9.2.3 Application Curve
Figure 5. Transition Time vs VCC
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in
Recommended Operating Conditions.
Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF capacitor is recommended and if there are multiple VCC pins then 0.01-μF or 0.022-μF
capacitor is recommended for each power pin. Multiple bypass capacitors may be used in parallel to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
must be installed as close to the power pin as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of
digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3
of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at
the outside connections result in undefined operational states. Specified below are the rules that must be
observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low
bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on
the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense or is
more convenient.
11.2 Layout Example
Figure 6. Layout Diagram
l TEXAS INSTRUMENTS
12
SN54HC08
,
SN74HC08
SCLS081G –DECEMBER 1982–REVISED JUNE 2016
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Product Folder Links: SN54HC08 SN74HC08
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
Implications of Slow or Floating CMOS Inputs,SCBA004
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL
DOCUMENTS TOOLS &
SOFTWARE SUPPORT &
COMMUNITY
SN54HC08 Click here Click here Click here Click here Click here
SN74HC08 Click here Click here Click here Click here Click here
12.3 Community Resource
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 29-Jun-2019
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-8404701VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8404701VC
A
SNV54HC08J
5962-8404701VDA ACTIVE CFP W 14 25 TBD A42 N / A for Pkg Type -55 to 125 5962-8404701VD
A
SNV54HC08W
84047012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84047012A
SNJ54HC
08FK
8404701CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404701CA
SNJ54HC08J
8404701DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404701DA
SNJ54HC08W
JM38510/65203B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
65203B2A
JM38510/65203BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65203BCA
JM38510/65203BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65203BDA
M38510/65203B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
65203B2A
M38510/65203BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65203BCA
M38510/65203BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
65203BDA
SN54HC08J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC08J
SN74HC08D ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DBR ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 29-Jun-2019
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74HC08DR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DT ACTIVE SOIC D 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08DTE4 ACTIVE SOIC D 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08N ACTIVE PDIP N 14 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC08N
SN74HC08NE4 ACTIVE PDIP N 14 25 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC08N
SN74HC08PW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08PWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SN74HC08PWT ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC08
SNJ54HC08FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84047012A
SNJ54HC
08FK
SNJ54HC08J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404701CA
SNJ54HC08J
SNJ54HC08W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404701DA
SNJ54HC08W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 29-Jun-2019
Addendum-Page 3
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54HC08, SN54HC08-SP, SN74HC08 :
•Catalog: SN74HC08, SN54HC08
•Automotive: SN74HC08-Q1, SN74HC08-Q1
•Military: SN54HC08
•Space: SN54HC08-SP
NOTE: Qualified Version Definitions:
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 29-Jun-2019
Addendum-Page 4
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•Military - QML certified for Military and Defense Applications
•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS ’ I‘KO '«Pt» Reel DlameIer A0 Dimension designed to accommodate the component Width Bo Dimension designed to accommodate the component Iength K0 Dimension designed to accommodate the component thickness 7 w Overau Wiotn onhe carrier Iape i P1 Pitch between successive cawty centers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE QOODOOOO ,,,,,,,,,,, ‘ User DIreCIIOn 0' Feed SprockeI Hoies Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74HC08DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC08DR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.1 8.0 16.0 Q1
SN74HC08DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC08DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC08DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC08DT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74HC08PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74HC08PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74HC08PWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74HC08PWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Dec-2018
Pack Materials-Page 1
I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74HC08DR SOIC D 14 2500 367.0 367.0 38.0
SN74HC08DR SOIC D 14 2500 364.0 364.0 27.0
SN74HC08DR SOIC D 14 2500 333.2 345.9 28.6
SN74HC08DRG4 SOIC D 14 2500 367.0 367.0 38.0
SN74HC08DRG4 SOIC D 14 2500 333.2 345.9 28.6
SN74HC08DT SOIC D 14 250 210.0 185.0 35.0
SN74HC08PWR TSSOP PW 14 2000 367.0 367.0 35.0
SN74HC08PWR TSSOP PW 14 2000 364.0 364.0 27.0
SN74HC08PWRG4 TSSOP PW 14 2000 367.0 367.0 35.0
SN74HC08PWT TSSOP PW 14 250 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Dec-2018
Pack Materials-Page 2
MECHANICAL DATA AME; CHEF“ ELAR‘REE ?< (a="" cm;="" w”)="" ,eamess="" c="" ’7="" flflflflflfl\="" f="" e="" e="" e="" e="" ,="" kwwwg="" qfijrm“="" a="" i:="" i7="" i4="" i:="" i:="" e7="" eiflfiiflfizj="" vvwwttflfl="" 1="" notes="" ah="" ineur="" dimensions="" are="" in="" inches="" (minmeiers).="" this="" cruwg="" i5="" subjeci="" i0="" chcnge="" without="" noiice="" this="" package="" car="" he="" hermeticuiiy="" secied="" mm="" a="" metai="" ic="" i'ciis="" wiihi="" jedec="" n87004="" 50m)="" {mm="" instruments="" w.="" (i.="" cam="">
MECHANICAL DATA W (R—GDFP—F14) CERAM‘C DUAL FLATPACK Ease and Seating Wane 0.250 (6.60) 00‘5 (W) 0235 (5.97) f 0. 026 (0 as) ‘ ‘ 0.005 0.20 _ 00 2.03) 0.004 (0.10) 0,045 1.14 47 0,280 (7.11) MAX 4» 0.019 0.48 1 H i 0.015 50.35; :3 I: T I: :1 :I I: 0.050 (1.27) (:3 ::I 0.390 (9 91) 7' I: :1 0.335 (0.51) :l I: 1:3 ::1 1:3 ::1 “-005 (0-13) “‘N 4 Manes 1:3 I: i 7 E f 0.560 (9.11) 0.360 (0.14) 0.250 (0.35) 0,250 (6.35) 404013072/r 01/11 NOTES: A. AH Hnear dimensions are in inches (m1111meters). B. This dram’ng 1: 5mm \0 change mm nofice. c, This package can be hermeticany sea1ed mm 0 ceramic lid usmg glass iriL 0, \ndex paint '15 pmw'ded an cap for terminm idenmcutiun omy. E. Faus within M1L STD 1835 GDFPW’FH i TEXAS INSTRUMENTS www.mmm
GENERIC PACKAGE VIEW J 14 CDIP - 5.08 mm max heigm CERAMIC DUAL IN LINE PACKAGE [I l l 'I I.“ Images above are jusl a represenlalion of the package family, aclual package may vary Refel lo the produd dala sheel for package details. 4040053756 I TEXAS INSTRI IMFNTS
www.ti.com
PACKAGE OUTLINE
C
14X .008-.014
[0.2-0.36]
TYP
-15
0
AT GAGE PLANE
-.314.308 -7.977.83[ ]
14X -.026.014 -0.660.36[ ]
14X -.065.045 -1.651.15[ ]
.2 MAX TYP
[5.08] .13 MIN TYP
[3.3]
TYP-.060.015 -1.520.38[ ]
4X .005 MIN
[0.13]
12X .100
[2.54]
.015 GAGE PLANE
[0.38]
A
-.785.754 -19.9419.15[ ]
B -.283.245 -7.196.22[ ]
CDIP - 5.08 mm max heightJ0014A
CERAMIC DUAL IN LINE PACKAGE
4214771/A 05/2017
NOTES:
1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.
78
14
1
PIN 1 ID
(OPTIONAL)
SCALE 0.900
SEATING PLANE
.010 [0.25] C A B
fi©©©©©©© ““w“‘¢‘w‘w““‘ ,w@@@@@@ A RLr
www.ti.com
EXAMPLE BOARD LAYOUT
ALL AROUND
[0.05] MAX.002
.002 MAX
[0.05]
ALL AROUND
SOLDER MASK
OPENING
METAL
(.063)
[1.6]
(R.002 ) TYP
[0.05]
14X ( .039)
[1]
( .063)
[1.6]
12X (.100 )
[2.54]
(.300 ) TYP
[7.62]
CDIP - 5.08 mm max heightJ0014A
CERAMIC DUAL IN LINE PACKAGE
4214771/A 05/2017
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE: 5X
SEE DETAIL A SEE DETAIL B
SYMM
SYMM
1
78
14
DETAIL A
SCALE: 15X
SOLDER MASK
OPENING
METAL
DETAIL B
13X, SCALE: 15X
MECHANICAL DATA D U1 4)} 0 (3'4) DLASHC SMALL 0U ¥N¥ 4040047 5/M 06/1‘ NO'ES, A AH Hnec' dimensmrs c'e m 'mc'ves ['nflhmeter5> B Th5 drawer ‘5 subje», ,0 change mm: Home, A Body \cngth docs rm mac mod Hoar, p'omswons, (xv gmc bms Mom mm warmers, or gm buns sha‘ nm exceed 3005 (015) eam swce @ Body mm does 101 meme 11mm fish. E Rdererce JEDEC MS 012 mam AB, nter‘ec: flash sfu‘ not exceed 0017 (043) each swde {If TEXAS INSTRUMENTS www.1i.com
LAND PATTERN DATA D (R7PDSOmGl4) PLASTlC SMALL OUTLINE Example Board Layout Sterlazlogpeulyngs (Mole c) —— <—14x0,55 -hhheb&&t="" tmedddifi§n%="" 5.40="" 5,40="" @eeeeeej="" rfihfl§eflhj="" —=""> ——l 2x1,27 Example Non Soldermask Delined Pad Example Pad Geometry (See Note c) F Example l / Solder Mask Opening 7 0 07 f (See Note E) All Armlnd ,/ tzllmss/E oa/lz NOTES: A. All linear dimensions are in millimeters. a, Tnis drawan is subject to cnonae wl'lhuul notice. c. Publlcutl’on chs7351 is recommended tor alternate desl’gns. D. Laser ctming apertures w‘lth trapezoidal walls and also roundlng comers wlll otter better paste release. Customers should contact their board assembly site for stencil design recommendations, Reter tc ch—7525 lor otner stencil recommendations. E. Customers snoola contact their ooard looricotion site lor solder musk tolerances between ond oroond signol oods. {I} Tums INSTRUMENTS www.li.com
MECHANICAL DATA "7’7 : 3‘ AST‘C SMAH CJ’ N7 HHHHHHH . . ‘7,4’ 44*, A f;—‘ NO'ES' A AH Hnec' dimensmrs c'e m m'\\me(ers Dwmens'amnq cnd tu‘erc'vcmg per ASME w 5M 1994, Tm drawer ‘5 subje», ,o "hangs wnrau: Home, Budy \evvgih ‘ues m W" Le mom Hush, pyuws‘m Ur guts Ms M exceed 0,15 each m & Rudy wde does NM Wands \Mer end flair \Mefiead 'Wclsh shaH um exceed 0‘75 each S‘de E Fa‘s WM" JEDEC M07153 MUM "\u>h, main: bus, 01 guie buns shuH {if TEXAS INSTRUMENTS www.ci.com
PW (RiPDsoicM) LAND PATTERN DATA PLASTHC SMALL OUTLINE Example Board Layout (Male 0) —>| ‘,——12x0 65 HHHHHHHi 5,60 HHHHHHHHi l“ l l l Example Non So‘dermask Defined Pad 4 x 1,60 / H l <—0,07 y/="" ah="" around="" pad="" seamelry="" (see="" nale="" c)="" solder="" mask="" opening="" (see="" note="" e)="" stencil="" 0="" en'ln="" s="" (notepd)="" ‘3="" 14x0="" 30="" h="" '«,lzxo="" 65="" ~hhhhhh~="" 5,60="" hhhhhhh—="" example="" example="" 421128472/6="" 08/15="" notes:="" ah="" h‘lneor="" dimensions="" one="" in="" rnihll'rneters.="" tn‘ls="" dvowing="" is="" subject="" lp="" change="" wltnoul="" nallee.="" publl'cotlon="" hpcjssh="" is="" recommended="" lar="" allemale="" deslgns.="" laser="" cutllng="" apertures="" wch="" tropexoidm="" walls="" and="" also="" raund‘lna="" comers="" wlll="" we!="" better="" pasle="" release="" customers="" show="" contact="" their="" board="" assembly="" sl’te="" (ov="" stenci‘="" design="" recommendations.="" reler="" to="" ”50—7525="" lur="" other="" stencl‘="" recommendotluns="" customers="" shou‘d="" contact="" their="" board="" hoercot'lon="" shte="" (or="" solder="" musk="" tolerances="" between="" and="" around="" s'lgnol="" pods.="" *1?="" tums="" instruments="" www.ti.com="">
MECHANICAL DATA N (R—PDlP-T“) PLASTIC DUAL—IN—LINE PACKAGE 16 P15 SHOWN PWS " A L . [NM 15 a 20 16 9 0 775 U 777 0 SZU '1 USE 3 , 1H HH HH r% r’H r"—1 r’H H1 1 A VAX “9‘69? (191591 (23,37) (25,92) 0 250 (6,50‘ A MN [1145‘ 0142‘ 0.350 new 3 O 240 (6.10), 15 92/ (1832/ (2 .59) (23,58) MSiUO‘ (A AA AA Ari AA AA AA R1 &. VAR1AT1CN M RR AC AD 1 B 0070( (17s) 0015 (111) A 0045 (1,111 g n > , ‘ -) 3.020 (0,51) MW w o 5 (0 35) 0200( 38) MAX f, ), Gnu E Home 1 1‘ 9 fix—1%)” 1 0125’ 1/111 4% 0010 (v.37 ) NOM 31a) U L»- J 0450 (13,92) MAX L 202‘ (0,53) » e c 015 (0,35) / \ a; 00‘s (0,Zb)® / \ 1 1 \\¥,// 11/18 Pm (My > @ 20 Pm vendor upho'v mom/r 17/7037 NO'FS A AH Mnec' mmensmr‘fi: B 1m: drawmq 1s sume m muss (m1111mevem) 0 change mm): nofice /c\ FuHs wumn JEDEC M57001, except 15 an: 20 p171 'r1111mLm body 1mm (01m A) A The 70 p171 and 15m} shmflder Md” 15 a ve'vdnr 0311071, eher NIH Dr 111 wkflh INSI'RUMENTS www.1i.com
oo A‘ioyi 55 fiHHHHHHHHHHHHfi {'3 TEXAS INSTRUMENTS
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
IMPORTANT NOTICE AND DISCLAIMER
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AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
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Copyright © 2019, Texas Instruments Incorporated

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