ON Semiconductor“
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 4
1Publication Order Number:
NCP1411/D
NCP1411
Sync−Rect PFM Step−Up
DC−DC Converter with
Low−Battery Detector and
Ring−Killer
NCP1411 is a monolithic micropower high frequency Boost
(step−up) voltage switching converter IC specially designed for
battery operated hand−held electronic products up to 250 mA loading.
It integrates Synchronous Rectifier for improving efficiency as well as
eliminating the external Schottky Diode. High switching frequency
(up to 600 kHz) allows low profile inductor and output capacitor being
used. Low−Battery Detector, Logic−Controlled Shutdown and
Cycle−by−Cycle Current Limit provide value−added features for
various battery−operated applications. The innovative Ring−Killer
circuitry guarantees quiet operation in discontinuous conduction
mode. With all these functions ON, the device quiescent supply
current is only 9.0 mA typical. This device is available in the space
saving compact Micro8t package.
Features
•Pb−Free Package is Available
•High Efficiency, up to 92%
•Very Low Device Quiescent Supply Current of 9.0 mA Typical
•Built−in Synchronous Rectifier (P−FET) Eliminates One External
Schottky Diode
•High Switching Frequency (up to 600 kHz) Allows use of Small Size
Inductor
•High Accuracy Reference Output, 1.19 V $0.6% @ 25°C, can
supply more than 2.5 mA when VOUT ≥ 3.3 V
•Ring−Killer for Quiet Operation in Discontinuous Conduction Mode
•1.0 V Startup at No Load Guaranteed
•Output Voltage from 1.5 V to 5.5 V Adjustable
•Output Current up to 250 mA @ VIN = 2.5 V, VOUT = 3.3 V
•Logic−Controlled Shutdown
•Open Drain Low−Battery Detector Output
•1.0 A Cycle by Cycle Current Limit
•Low Profile and Minimum External Parts
•Compact Micro8 Package
Typical Applications
•Personal Digital Assistant (PDA)
•Handheld Digital Audio Product
•Camcorder and Digital Still Camera
•Handheld Instrument
•Conversion from One or Two NiMH or NiCd, or One Li−ion Cell
to 3.3 V/5.0 V
Micro8
DM SUFFIX
CASE 846A
1
8
PIN CONNECTIONS
A2 = Device Marking
A = Assembly Location
Y = Year
W = Work Week
(Top View)
MARKING
DIAGRAM
A2
AYW
1
FB 8OUT
2
LBI/EN
3
LBO
4
REF
7LX
6GND
5BAT
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Device Package Shipping†
ORDERING INFORMATION
NCP1411DMR2 Micro8 4000 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
NCP1411DMR2G Micro8
(Pb−Free)
4000 Tape & Reel
Shumown
Open Dram
Input
Low Banery
Open Dram
Ompul
Figure
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Figure 1. Typical Operating Circuit
FB
LBI/EN
LBO
REF
OUT
LX
GND
BAT
4
3
2
1
5
6
7
8
150 nF
33 mF
NCP1411
+
350 k
10 mF22 mH
220 pF 150 pF
200 k
CEN
120 nF
Output 1.5 to 5.5 V
IOUT Typical
Up to 250 mA at
3.3 V Output
and 2.5 V Input
Input
1 V to
VOUT
Low Battery
Sense Input
Shutdown
Open Drain
Input
Low Battery
Open Drain
Output
RLB1 RLB2
PIN FUNCTION DESCRIPTION
Pin # Symbol Pin Description
1 FB Output Voltage Feedback Input.
2 LBI/EN Low−Battery Detector Input and IC Enable.
3 LBO Open−Drain Low−Battery Detector Output. Output is LOW when VLBI is < 1.178 V. LBO is high impedance during
shutdown.
4 REF 1.190 V Reference Voltage Output, bypassing with 150 nF capacitor if this pin is not loaded, bypassing with 1.0 mF
if this pin is loaded up to 2.5 mA @ VOUT = 3.3 V.
5 BAT Battery input connection for internal Ring−Killer.
6 GND Ground.
7 LX N−Channel and P−Channel Power MOSFET Drain Connection.
8 OUT Power Output. OUT also provides bootstrapped power to the device.
MAXIMUM RATINGS
Rating Symbol Value Unit
Device Power Supply (Pin 8) VOUT −0.3 to 6.0 V
Input/Output Pins (Pins 1−5, Pin 7) VIO −0.3 to 6.0 V
Thermal Characteristics − Micro8 Plastic Package
Maximum Power Dissipation @ TA = 25°C
Thermal Resistance, Junction−to−Air
PD
RqJA
520
240
mW
°C/W
Operating Junction Temperature Range TJ−40 to +150 °C
Operating Ambient Temperature Range TA−40 to +85 °C
Storage Temperature Range Tstg −55 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device contains ESD protection and exceeds the following tests:
Human Body Model (HBM) "2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM) "200 V per JEDEC standard: JESD22−A115.
2. The maximum package power dissipation limit must not be exceeded.
PD+TJ(max) *TA
RqJA
3. Latchup Current Maximum Rating: "150 mA per JEDEC standard: JESD78.
4. Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J−STD−020A.

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ELECTRICAL CHARACTERISTICS (VOUT = 3.3 V, TA = 25°C for typical value, −40°C ≤ T
A ≤ 85°C for min/max values
unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
Operating Input Voltage VIN 1.0 −5.5 V
Output Voltage Range (Adjusted by external feedback) VOUT VIN −5.5 V
Reference Voltage (CREF = 150 nF, under no loading, TA = 25°C) VREF_NL 1.183 1.190 1.197 V
Reference Voltage
(CREF = 150 nF, under no loading, −40°C ≤ TA ≤ 85°C)
VREF_NL_A 1.178 −1.202 V
Reference Voltage Temperature Coefficient TCVREF −0.03 −mV/°C
Reference Voltage Load Current
(VOUT = 3.3 V, VREF = VREF_NL ±1.5%, CREF = 1.0 mF) (Note 5)
IREF 2.5 − − mA
Reference Voltage Load Regulation
(VOUT = 3.3 V, ILOAD = 0 to 100 mA, CREF = 1.0 mF)
VREF_LOAD −0.015 1.0 mV
Reference Voltage Line Regulation
(VOUT from 1.5 V to 5.5 V, CREF = 1.0 mF)
VREF_LINE −0.03 1.0 mV/V
FB, LBI Input Threshold (ILOAD = 0 mA) VFB, VLBI 1.174 1.190 1.200 V
N−FET ON Resistance RDS(ON)−N−0.6 −W
P−FET ON Resistance RDS(ON)−P−0.9 −W
LX Switch Current Limit (N−FET) ILIM −1.0 −A
Operating Current into OUT
(VFB = 1.4 V, i.e. no switching, VOUT = 3.3 V)
IQ−9.0 14 mA
Shutdown Current into OUT (LBI/EN = GND) ISD −0.05 1.0 mA
LX Switch MAX. ON−Time (VFB = 1.0 V, VOUT = 3.3 V) tON 1.2 1.4 1.8 mS
LX Switch MIN. OFF−Time (VFB = 1.0 V, VOUT = 3.3 V) tOFF 0.25 0.31 0.37 mS
FB Input Current IFB −1.5 9.0 nA
Shutdown Current into BAT (LBI/EN = 0 V, VOUT = VBAT = 3.0 V) ILBT −50 −nA
BAT to LX resistance (VFB = 1.4 V, VOUT = 3.3 V) RLBT_LX −100 −W
LBI/EN Input Current ILBI/EN −1.5 8.0 nA
LBO Low Output Voltage (VLBI = 0 V, ISINK = 1.0 mA) VLBO_L − − 0.05 V
ENABLE (Pin 2) Input threshold, Low VEN − − 0.3 V
ENABLE (Pin 2) Input threshold, High VEN 0.6 − − V
5. Loading capability increases with VOUT
.
HI—H—-
Figure 2. Simplified Functional Diagram
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Figure 2. Simplified Functional Diagram
Chip
Enable
Voltage
Reference
−
+
−
+
PFM
−
+
−
+
20 mV
GND
GND
GND
VDD
VDD
M1
GND
ILIM
_ILIM
1
4
2
ZLC
_VREFOK
_PFM
_CEN
_PWQONCE
_ZCUR
_MSON
_MAINSW2ON
_SYNSW2ON
CONTROL LOGIC
VDD VOUT
FB
REF
LBI/EN
VBAT
_MAINSWOFD
M3
_SYNSWOFD
5
7
8
6
3
BAT
LX
OUT
LBO
M2
SENSE-
FET
GND
RSENSE
+
+
\ \ \ \ \ \
/ \
V In
V
x x H
P—FEanp /
/
N
\ \ \
W‘THOUT SCHOTI’KY D‘ODE /
/
\
\_
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TYPICAL OPERATING CHARACTERISTICS
Figure 3. Reference Voltage versus Output
Current
1 10 1000100
1.220
1.190
1.200
VREF
, REFERENCE VOLTAGE (V)
ILOAD, OUTPUT CURRENT (mA)
1.195
1.205
1.210
1.215
Figure 4. Reference Voltage versus Input
Voltage at OUT Pin
12 64
1.195
1.180
1.186
VREF
, REFERENCE VOLTAGE (V)
VOUT
, INPUT VOLTAGE AT OUT PIN (V)
1.183
1.189
1.192
Figure 5. Reference Voltage versus
Temperature
−40 0 10020
1.194
1.184
VREF
, REFERENCE VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
1.186
1.188
1.190
1.192
Figure 6. Switch ON Resistance versus
Temperature
−40 0 10020
1.5
0
0.6
RDS(on), SWITCH ON RESISTANCE (W)
TA, AMBIENT TEMPERATURE (°C)
0.3
0.9
1.2
Figure 7. LX Switch Max. ON Time versus
Temperature
−40 0 10040
1.8
1.2
1.4
LX, SWITCH MAX. ON TIME (ton/mS)
TA, AMBIENT TEMPERATURE (°C)
1.3
1.5
1.6
1.7
0 20 120100
1.9
0.6
1.1
VBATT
, MIN. STARTUP BATTERY VOLTAGE (V)
ILOAD, OUTPUT LOADING CURRENT (mA)
0.9
1.4
1.6
Figure 8. Min. Startup Battery Voltage versus
Loading Current
35
−20 40 60 80
VOUT = 3.3 V
L = 22 mH
CIN = 10 mF
COUT = 33 mF
CREF = 1 mF
TA = 25°C
VIN = 1.8 V
VIN = 2.2 V
VIN = 3.0 V
CREF = 1 mF
TA = 25°C
IREF = 2.5 mA
IREF = 0 mA
VOUT = 3.3 V
CREF = 150 nF
IREF = 0 mA
−20 40 60 80
VOUT = 3.3 V
P−FET (M2)
N−FET (M1)
−20 20 8060 40 60 80
WITHOUT SCHOTTKY DIODE
WITH SCHOTTKY DIODE
(MBR0502)
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Figure 9. Efficiency versus Load Current
1 10 1000100
100
50
70
EFFICIENCY (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
60
80
90
Figure 10. Efficiency versus Load Current
Figure 11. Efficiency versus Load Current Figure 12. Efficiency versus Load Current
Figure 13. Efficiency versus Load Current Figure 14. Efficiency versus Load Current
VIN = 1.8 V
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
L = 22 mH
L = 10 mH
L = 15 mH
1 10 1000100
100
50
70
EFFICIENCY (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
60
80
90
VIN = 2.2 V
VOUT = 5 V
CIN = 10 mF
COUT = 33 mF
L = 22 mH
L = 27 mH
1 10 1000100
100
EFFICIENCY (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
VIN = 2.2 V
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
L = 22 mH
L = 10 mH
L = 15 mH
1 10 1000100
100
50
70
EFFICIENCY (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
60
80
90
L = 22 mH
L = 27 mH
50
70
60
80
90
1 10 1000100
100
EFFICIENCY (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
VIN = 3 V
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
L = 22 mH
L = 10 mH
L = 15 mH
1 10 1000100
100
50
70
EFFICIENCY (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
60
80
90
VIN = 4.5 V
VOUT = 5 V
CIN = 10 mF
COUT = 33 mF
L = 22 mH
L = 27 mH
50
70
60
80
90
VIN = 2.2 V
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
2+
mmvmrm
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Figure 15. Output Voltage Change versus Load
Current
1 10 1000100
3.0
−3.0
−1.0
OUTPUT VOLTAGE CHANGE (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
−2.0
1.0
2.0
Figure 16. Output Voltage Change versus Load
Current
Figure 17. Battery Input Voltage versus Output
Ripple Voltage
Figure 18. Battery Input Voltage versus Output
Ripple Voltage
Figure 19. No Load Operating Current versus
Input Voltage at OUT Pin Figure 20. Startup Transient Response
L = 22 mH
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
VIN = 1.8 V
1 1.5 32
200
VRIPPLE, RIPPLE VOLTAGE (mVp−p)
VBATT
, BATTERY INPUT VOLTAGE (V)
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
L = 22 mH
100 mA
0
80
40
120
160
023
20
IBATT
, NO LOAD OPERATING CURRENT (mA)
VOUT
, INPUT VOLTAGE AT OUT PIN (V)
0
8
4
12
16
15647
2.5
200 mA
1 1.5 32
200
VRIPPLE, RIPPLE VOLTAGE (mVp−p)
VBATT
, BATTERY INPUT VOLTAGE (V)
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
L = 15 mH
100 mA
0
80
40
120
160
2.5
200 mA
0
3 V
2.2 V
1 10 1000100
3.0
−3.0
−1.0
OUTPUT VOLTAGE CHANGE (%)
ILOAD, OUTPUT LOADING CURRENT (mA)
−2.0
1.0
2.0
L = 15 mH
VOUT = 3.3 V
CIN = 10 mF
COUT = 33 mF
03 V
2.2 V
(VIN = 2.2 V, VOUT = 3.3 V, ILOAD = 100 mA; L = 22 mH,
COUT = 33 mF)
Upper Trace: Output Voltage Waveform, 2.0 V/Division
Lower Trace: Shutdown Pin Waveform, 1.0 V/Division
VIN = 1.8 V
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Figure 21. Continuous Conduction Mode
Switching Waveform
Figure 22. Discontinuous Conduction Mode
Switching Waveform
Figure 23. Line Transient Response
for VOUT = 3.3 V
Figure 24. Load Transient Response
for VIN = 1.8 V
Figure 25. Load Transient Response
for VIN = 2.4 V
Figure 26. Load Transient Response
for VIN = 3.3 V
(VIN = 2.2 V, VOUT = 3.3 V, ILOAD = 100 mA; L = 22 mH,
COUT = 33 mF)
Upper Trace: Voltage at LX pin, 2.0 V/Division
MiddleTrace: Output Voltage Ripple, 50 mV/Division
Lower Trace: Inductor Current, IL, 100 mA/Division
(VIN = 2.2 V, VOUT = 3.3 V, ILOAD = 30 mA; L = 22 mH,
COUT = 33 mF)
Upper Trace: Voltage at LX pin, 2.0 V/Division
MiddleTrace: Output Voltage Ripple, 50 mV/Division
Lower Trace: Inductor Current, IL, 100 mA/Division
(VIN = 1.8 V to 3.0 V, L = 22 mH, COUT = 33 mF)
Upper Trace: Output Voltage Ripple, 100 mV/Division
Lower Trace: Battery Voltage, VIN, 1.0 V/Division
(VOUT = 3.3 V, ILOAD = 10 mA to 100 mA; L = 22 mH, COUT = 33 mF)
Upper Trace: Output Voltage Ripple, 100 mV/Division
Lower Trace: Load Current, ILOAD, 50 mA/Division
(VOUT = 3.3 V, ILOAD = 10 mA to 100 mA; L = 22 mH, COUT = 33 mF)
Upper Trace: Output Voltage Ripple, 100 mV/Division
Lower Trace: Load Current, ILOAD, 50 mA/Division
(VOUT = 3.3 V, ILOAD = 10 mA to 100 mA; L = 22 mH, COUT = 33 mF)
Upper Trace: Output Voltage Ripple, 100 mV/Division
Lower Trace: Load Current, ILOAD, 50 mA/Division

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DETAILED OPERATION DESCRIPTIONS
NCP1411 is a monolithic micropower high frequency
step−up voltage switching converter IC specially designed
for battery operated hand−held electronic products up to
250 mA loading. It integrates Synchronous Rectifier for
improving efficiency as well as eliminating the external
Schottky Diode. High switching frequency (up to 600 kHz)
allows low profile inductor and output capacitor being used.
Low−Battery Detector, Logic−Controlled Shutdown and
Cycle−by−Cycle Current Limit provide value−added
features for various battery−operated application. With all
these functions ON, the quiescent supply current is only
9.0 mA typical. This device is available in a compact Micro8
package.
PFM Regulation Scheme
From the simplified Functional Diagram (Figure 2), the
output voltage is divided down and fed back to pin 1 (FB).
This voltage goes to the non−inverting input of the PFM
comparator whereas the comparator’s inverting input is
connected to REF. A switching cycle is initiated by the
falling edge of the comparator, at the moment, the main
switch (M1) is turned ON. After the maximum ON−time
(typical 1.4 mS) elapses or the current limit is reached, M1
is turned OFF, and the synchronous switch (M2) is turned
ON. The M1 OFF time is not less than the minimum
OFF−time (typical 0.31 mS), this is to ensure energy transfer
from the inductor to the output capacitor. If the regulator is
operating at Continuous Conduction Mode (CCM), M2 is
turned OFF just before M1 is supposed to be ON again. If the
regulator is operating at Discontinuous Conduction Mode
(DCM), which means the coil current will decrease to zero
before the next cycle, M1 is turned OFF as the coil current
is almost reaching zero. The comparator (ZLC) with fixed
offset is dedicated to sense the voltage drop across M2 as it
is conducting, when the voltage drop is below the offset, the
ZLC comparator output goes HIGH, and M2 is turned OFF.
Negative feedback of closed loop operation regulates
voltage at pin 1 (FB) equal to the internal voltage reference
(1.190 V).
Synchronous Rectification
Synchronous Rectifier is used to replace Schottky Diode
for eliminating the conduction loss contributed by forward
voltage of the latter. Synchronous Rectifier is normally
realized by powerFET with gate control circuitry which,
however, involved relative complicated timing concerns.
As main switch M1 is being turned OFF, if the
synchronous switch M2 is just turned ON with M1 not being
completed turned OFF, current will be shunt from the output
bulk capacitor through M2 and M1 to ground. This power
loss lowers overall efficiency. So a certain amount of dead
time is introduced to make sure M1 is completely OFF
before M2 is being turned ON.
When the main regulator is operating in CCM, as M2 is
being turned OFF, and M1 is just turned ON with M2 not
being completely turned OFF, the above mentioned
situation will occur. So dead time is introduced to make sure
M2 is completely turned OFF before M1 is being turned ON.
When the regulator is operating in DCM, as coil current
is dropped to zero, M2 is supposed to be OFF. Fail to do so,
reverse current will flow from the output bulk capacitor
through M2 and then the inductor to the battery input. It
causes damage to the battery. So the ZLC comparator comes
with fixed offset voltage to switch M2 OFF before any
reverse current builds up. However, if M2 is switch OFF too
early, large residue coil current flows through the body diode
of M2 and increases conduction loss. Therefore,
determination on the offset voltage is essential for optimum
performance.
With the implementation of synchronous rectification,
efficiency can be as high as 92%. For single cell input
voltage, use an external Schottky diode such as MBR0520
connected from pin 7 to pin 8 to ensure quick startup.
Ring−Killer
When the device entered Discontinuous Conduction
Mode operation, a typical ringing at LX pin will start while
the inductor current just ceased. This ringing is caused
primarily by the capacitance and inductance at LX node and
the result can produce unwanted EMI problem to the system.
In order to eliminate this ringing, an internal damping switch
(M3) is implemented to provide a low impedance path to
dissipate the residue energy stored in the inductor once the
operation entered the Discontinuous Conduction Mode.
This feature can improve the EMI problem. The
performance of the Ring−Killer switch is shown in
Figure 22.
Cycle−by−Cycle Current Limit
From Figure 2, SENSEFET is applied to sample the coil
current as M1 is ON. With that sample current flowing
through a sense resistor, sense−voltage is developed.
Threshold detector (ILIM) detects whether the
sense−voltage is higher than preset level. If it happens,
detector output signifies the CONTROL LOGIC to switch
OFF M1, and M1 can only be switched ON as next cycle
starts after the minimum OFF−time (typical 0.31 mS). With
properly sizing of SENSEFET and sense resistor, the peak
coil current limit is set at 1.0 A typically.
Voltage Reference
The voltage at REF is set typically at +1.190 V. It can
deliver up to 2.5 mA with load regulation ±1.5%, at VOUT
equal to 3.3 V. If VOUT is increased, the REF load capability
can also be increased. A bypass capacitor of 0.15 mF is
required for proper operation when REF is not loaded. If
REF is loaded, 1.0 mF capacitor at REF is needed.
Shutdown
The IC will shutdown when the voltage at pin 2 (LBI/EN)
is pulled lower than 0.3 V. During shutdown, M1 and M2 are
both switched OFF, however, the body diode of M2 allows
current flow from battery to the output, the IC internal circuit
will consume less than 0.05 mA current typically. If the

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pin 1 voltage raised higher than 0.6 V, the IC will be enabled.
The internal circuit will only consume 9.0 mA current
typically from the OUT pin. In order to ensure proper
startup, a timing capacitor CEN as shown in Figure 1 is
required to provide the reset pulse during batteries are
plugged in. The product of RLB1 and CEN must be larger than
28 msec.
Low−Battery Detection
A comparator with 30 mV hysteresis is applied to perform
the low−battery detection function. When pin 2 (LBI/EN) is
at a voltage, which can be defined by a resistor divider from
the battery voltage, lower than the internal reference
voltage, 1.190 V, the comparator output will cause a 50 Ohm
low side switch to be turned ON. It will pull down the
voltage at pin 3 (LBO) which has a hundreds kilo−Ohm of
pull−high resistance. If the pin 2 voltage is higher than
1.190 V +30 mV, the comparator output will cause the
50 Ohm low side switch to be turned OFF, pin 3 will become
high impedance, and its voltage will be pulled high.
APPLICATIONS INFORMATION
Output Voltage Setting
The output voltage of the converter is determined by the
external feedback network comprised of RFB1 and RFB2 and
the relationship is given by:
VOUT +1.190 V ǒ1)RFB1
RFB2 Ǔ
where RFB1 and RFB2 are the upper and lower feedback
resistors respectively.
Low Battery Detect Level Setting
The Low Battery Detect Voltage of the converter is
determined by the external divider network comprised of
RLB1 and RLB2 and the relationship is given by:
VLB +1.190 V ǒ1)RLB1
RLB2 Ǔ
where RLB1 and RLB2 are the upper and lower divider
resistors respectively.
Inductor Selection
The NCP1411 is tested to produce optimum performance
with a 22 mH inductor at VIN = 3.0 V, VOUT = 3.3 V
supplying output current up to 250 mA. For other
input/output requirements, inductance in the range 10 mH to
47 mH can be used according to end application
specifications. Selecting an inductor is a compromise
between output current capability and tolerable output
voltage ripple. Of course, the first thing we need to obey is
to keep the peak inductor current below its saturation limit
at maximum current and the ILIM of the device. In NCP1411,
ILIM is set at 1.0 A. As a rule of thumb, low inductance values
supply higher output current, but also increase the ripple at
output and reducing efficiency, on the other hand, high
inductance values can improve output ripple and efficiency,
however it also limit the output current capability at the same
time. One other parameter of the inductor is its DC
resistance, this resistance can introduce unwanted power
loss and hence reduce overall efficiency, the basic rule is
selecting an inductor with lowest DC resistance within the
board space limitation of the end application.
Capacitors Selection
In all switching mode boost converter applications, both
the input and output terminals sees impulsive
voltage/current waveforms. The currents flowing into and
out of the capacitors multiplying with the Equivalent Series
Resistance (ESR) of the capacitor producing ripple voltage
at the terminals. During the syn−rect switch off cycle, the
charges stored in the output capacitor is used to sustain the
output load current. Load current at this period and the ESR
combined and reflected as ripple at the output terminal. For
all cases, the lower the capacitor ESR, the lower the ripple
voltage at output. As a general guide line, low ESR
capacitors should be used. Ceramic capacitors have the
lowest ESR, but low ESR tantalum capacitors can also be
used as a cost effective substitute.
Optional Startup Schottky Diode for Low Battery
Voltage
In general operation, no external schottky diode is
required, however, in case you are intended to operate the
device close to 1.0 V level, a schottky diode connected
between the LX and OUT pins as shown in Figure 27 can
help during startup of the converter. The effect of the
additional schottky was shown in Figure 8.
Figure 27. PCB Layout Recommendations
OUT
LX
NCP1411 COUT
LMBR0502
VOUT
PCB Layout Recommendations
Good PCB layout plays an important role in switching
mode power conversion. Careful PCB layout can help to
minimize ground bounce, EMI noise and unwanted
feedback that can affect the performance of the converter.
Hints suggested in below can be used as a guide line in most
situations.
Grounding
Star−ground connection should be used to connect the
output power return ground, the input power return ground
and the device power ground together at one point. All high
current running paths must be thick enough for current
flowing through and producing insignificant voltage drop
FB
LBI/EN
LBO
REF
Figure 28. Typical Application Schematic for 2 Alkaline Cells Supply
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11
along the path. Feedback signal path must be separated with
the main current path and sensing directly at the anode of the
output capacitor.
Components Placement
Power components, i.e. input capacitor, inductor and
output capacitor, must be placed as close together as
possible. All connecting traces must be short, direct and
thick. High current flowing and switching paths must be
kept away from the feedback (FB, pin 1) terminal to avoid
unwanted injection of noise into the feedback path.
Feedback Network
Feedback of the output voltage must be a separate trace
detached from the power path. External feedback network
must be placed very close to the feedback (FB, pin 1) pin and
sensing the output voltage directly at the anode of the output
capacitor.
CEN
120 nF
Figure 28. Typical Application Schematic for 2 Alkaline Cells Supply
FB
LBI/EN
LBO
REF
OUT
LX
GND
BAT
4
3
2
1
5
6
7
8
CREF
150 nF
VBATT
+
RFB1
335 k
CFB1
150 pF
RLB1
225 k
GND
CIN
10 mF/10 V COUT
33 mF/10 V
VOUT
GND
RLB2
330 k
RFB2
200 k
CFB2
220 pF
NCP1411
L
+
22 mH

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GENERAL DESIGN PROCEDURES
Switching mode converter design is considered as black
magic to most engineers, some complicate empirical
formulae are available for reference usage. Those formulae
are derived from the assumption that the key components,
i.e. power inductor and capacitors are available with no
tolerance. Practically, its not true, the result is not a matter
of how accurate the equations you are using to calculate the
component values, the outcome is still somehow away from
the optimum point. In below a simple method base on the
most basic first order equations to estimate the inductor and
capacitor values for NCP1411 operate in Continuous
Conduction Mode is introduced. The component value set
can be used as a starting point to fine tune the circuit
operation. By all means, detail bench testing is needed to get
the best performance out of the circuit.
Design Parameters:
VIN = 1.8 V to 3.0 V, Typical 2.4 V
VOUT = 3.3 V
IOUT = 200 mA (250 mA max)
VLB = 2.0 V
VOUT−RIPPLE = 40 mVP−P at IOUT = 250 mA
Calculate the feedback network:
Select RFB2 = 200 K
RFB1 +RFB2 ǒVOUT
VREF *1Ǔ
RFB1 +200 K ǒ3.3 V
1.19 V *1Ǔ+355 K
With the feedback resistor divider, additional small
capacitor, CFB1 in parallel with RFB1 is required to ensure
stability. The value can be in between 68 pF to 220 pF, the
rule is to select the lowest capacitance to ensure stability.
Also a small capacitor, CFB2 in parallel with RFB2 may also
be needed to lower the feedback ripple hence improve
output regulation. The use of CFB2 is a compromise between
output ripple level and regulation, so careful selection of the
value according to end application requirement is needed. In
this example, values for CFB1 and CFB2 are 150 pF and
220 pF respectively.
Calculate the Low Battery Detect divider:
VLB = 2.0 V
Select RLB2 = 330 K
RLB1 +RLB2 ǒVLB
VREF *1Ǔ
RLB1 +330 K ǒ2.0 V
1.19 V *1Ǔ+225 K
CEN +28 msec
225 K +120 nF
Determine the Steady State Duty Ratio, D for typical VIN,
operation will be optimized around this point:
VOUT
VIN +1
1*D
D+1*VIN
VOUT +1*2.4 V
3.3 V +0.273
Determine the average inductor current, ILAVG at maximum
IOUT:
ILAVG +IOUT
1*D+250 mA
1*0.273 +344 mA
Determine the peak inductor ripple current, IRIPPLE−P and
calculate the inductor value:
Assume IRIPPLE−P is 20% of ILAVG, the inductance of the
power inductor can be calculated as in below:
IRIPPLE−P = 0.20 x 344 mA = 68.8 mA
L+VIN tON
2IRIPPLE−P+2.4 V 1.4 mS
2(68.8 mA) +24.4 mH
Standard value of 22 mH is selected for initial trial.
Determine the output voltage ripple, VOUT−RIPPLE and
calculate the output capacitor value:
VOUT−RIPPLE = 40 mVP−P at IOUT = 250 mA
COUT wIOUT tON
VOUT *RIPPLE *IOUT ESRCOUT
where tON = 1.4 mS and ESRCOUT = 0.1 W,
COUT w250 mA 1.4 mS
40 mV *250 mA 0.1 W+23.33 mF
From above calculation, we need at least 23.33 mF in order
to achieve the specified ripple level at conditions stated.
Practically, a one level larger capacitor will be used to
accommodate factors not take into account in the
calculation. So a capacitor value of 33 mF is selected.
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PACKAGE DIMENSIONS
Micro8
DM SUFFIX
CASE 846A−02
ISSUE F
8X 8X
6X ǒmm
inchesǓ
SCALE 8:1
1.04
0.041
0.38
0.015
5.28
0.208
4.24
0.167
3.20
0.126
0.65
0.0256
S
B
M
0.08 (0.003) A S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A2.90 3.10 0.114 0.122
B2.90 3.10 0.114 0.122
C−−− 1.10 −−− 0.043
D0.25 0.40 0.010 0.016
G0.65 BSC 0.026 BSC
H0.05 0.15 0.002 0.006
J0.13 0.23 0.005 0.009
K4.75 5.05 0.187 0.199
L0.40 0.70 0.016 0.028
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. 846A−01 OBSOLETE, NEW STANDARD 846A−02.
−B−
−A−
D
K
G
PIN 1 ID
8 PL
0.038 (0.0015)
−T−
SEATING
PLANE
C
HJL
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NCP1411/D
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