MC74VHCT32A Datasheet by ON Semiconductor

0N Semiconductor® www.0nsem com H H H H H H H the output has a full 5.0 v CMos level output swing. The input Q protection circuitry on this device allows oyorvoltago tolerance on the 0 input, allowing the device to be used as a logic—level translator from ‘ H H H H H H H 3.0 v CMOS logic to 5.0 v CMOS Logic or from 1.8 v CMos logic to 3.0 v CMOS Logic while operating at tho high—vollagc power HHHHHHH supply. TSSOP-M verge: Tho MC74VHCT32A input structure provides pmlcclion when 355:3; va voltages up to 7.0 v are applied, regardless of the supply voltage. This o . allows the MC74VHCT32A to I): used to interface 5.0 v circuits to HHHHHHH 3.0V circuits. Tho output structures also provide protection when Vcc = l) V. Thcsc input and output uclurcs help prevent dcvicC destruction caused by supply voltage — input/output voltage mismatch, battery backup, hot insertion, otc. Features - High Speed: tPD = 3.2; ns (Typ) at vcc = 5.0 v - Low Power Dissipation: ICC = 2 MA (Max) at TA = 25°C - TTL—Compaliblc lnputs: vIL = 0.8 v; v.H = 2.0 v I Powcr Down Pmlcclion Provided on Inputs - Balanced Propagation Delays - Designed for 2.0 v to 5.5 v Operating Range - Low Noise: v0“, = 0.2; v (Max) - Pin and Function Compatible with Other Standard Logic Families - Latchup PCrfurmancC Exceeds 300 mA - ESD Performance: Human Body Model > 2000 v; Machine Model > 200 v - NLV Preﬁx for Automotive and Olhcr Applications Requiring Unique Site and Control change Requirements; AEC—QIUU Qualiﬁed and PPAP Capable - These Devices are Pb—Frcc, l-lalogen Frec/BFR Free and are RoHS Compliant to semiconduuotcampemuu industries. LLC 2cm I Publication January, 2019 — Rev. 5 Mc

January, 2019 − Rev. 5

1Publication Order Number:

MC74VHCT32A/D

MC74VHCT32A

Quad 2-Input OR Gate /

CMOS Logic Level Shifter

with LSTTL − Compatible Inputs

The MC74VHCT32A is an advanced high speed CMOS 2−input

OR gate fabricated with silicon gate CMOS technology. It achieves

high speed operation similar to equivalent Bipolar Schottky TTL

while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The device input is compatible with TTL−type input thresholds and

the output has a full 5.0 V CMOS level output swing. The input

protection circuitry on this device allows overvoltage tolerance on the

input, allowing the device to be used as a logic−level translator from

3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic

to 3.0 V CMOS Logic while operating at the high−voltage power

supply.

The MC74VHCT32A input structure provides protection when

voltages up to 7.0 V are applied, regardless of the supply voltage. This

allows the MC74VHCT32A to be used to interface 5.0 V circuits to

3.0 V circuits. The output structures also provide protection when

VCC = 0 V. These input and output structures help prevent device

destruction caused by supply voltage − input/output voltage mismatch,

battery backup, hot insertion, etc.

Features

•High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V

•Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C

•TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V

•Power Down Protection Provided on Inputs

•Balanced Propagation Delays

•Designed for 2.0 V to 5.5 V Operating Range

•Low Noise: VOLP = 0.8 V (Max)

•Pin and Function Compatible with Other Standard Logic Families

•Latchup Performance Exceeds 300 mA

•ESD Performance:

Human Body Model > 2000 V;

Machine Model > 200 V

•NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

TSSOP−14

DT SUFFIX

CASE 948G

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VHCT32AG

AWLYWW

SOIC−14

D SUFFIX

CASE 751A

†For additional marking information, refer to

Application Note AND8002/D.

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

ORDERING INFORMATION

MARKING

DIAGRAMS†

VHCT

32A

ALYW 



A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW, W = Work Week

G or  = Pb−Free Package

(Note: Microdot may be in either location)

!_H_H_H_|I_H_H_\ D \_H_H_H_l|_H_H_l www.cnsemi.com

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3Y1

6Y2

8Y3

11 Y4

Y = A)

Figure 1. Pin Connection and Marking Diagram (Top View)

1314 12 11 10 9 8

21 34567

VCC B4 A4 Y4 B3 A3 Y3

A1 B1 Y1 A2 B2 Y2 GND

Figure 2. Logic Diagram

Table 1. FUNCTION TABLE

Inputs Output

A B Y

MAXIMUM RATINGS

Symbol Parameter Value Unit

VCC DC Supply Voltage –0.5 to +7.0 V

Vin DC Input Voltage –0.5 to +7.0 V

Vout DC Output Voltage VCC = 0

High or Low State

–0.5 to +7.0

–0.5 to VCC + 0.5

IIK Input Diode Current −20 mA

IOK Output Diode Current (VOUT < GND; VOUT > VCC)±20 mA

Iout DC Output Current, per Pin ±25 mA

ICC DC Supply Current, VCC and GND Pins ±50 mA

PDPower Dissipation in Still Air, SOIC Package†

TSSOP Package†

500

450

Tstg Storage Temperature –65 to +150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

NOTE: This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,

precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance

circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must

always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

†Derating −SOIC Package: – 7 mW/°C from 65° to 125°C

TSSOP Package: − 6.1 mW/°C from 65° to 125°C

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RECOMMENDED OPERATING CONDITIONS

Symbol Characteristics Min Max Unit

VCC DC Supply Voltage 2.0 5.5 V

VIN DC Input Voltage 0.0 5.5 V

VOUT DC Output Voltage VCC = 0

High or Low State

0.0

5.5

VCC

TAOperating Temperature Range −55 +125 °C

tr , tfInput Rise and Fall Time VCC = 3.3V ± 0.3V

VCC = 5.0V ± 0.5V

100

ns/V

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V)

Symbol Characteristic

TA = 25°C

Unit

Typ Max

VOLP Quiet Output Maximum Dynamic VOL 0.3 0.8 V

VOLV Quiet Output Minimum Dynamic VOL − 0.3 − 0.8 V

VIHD Minimum High Level Dynamic Input Voltage 3.5 V

VILD Maximum Low Level Dynamic Input Voltage 1.5 V

DC ELECTRICAL CHARACTERISTICS

Symbol Parameter Test Conditions

VCC TA = 25°C TA ≤ 85°C TA ≤ 125°C

Unit

(V) Min Typ Max Min Max Min Max

VIH Minimum High−Level Input

Voltage

3.0

4.5

5.5

1.2

2.0

1.2

2.0

1.2

2.0

VIL Maximum Low−Level Input

Voltage

3.0

4.5

5.5

0.53

0.8

0.53

0.8

0.53

0.8

VOH Minimum High−Level Output

Voltage VIN = VIH or VIL

VIN = VIH or VIL

IOH = −50 mA

3.0

4.5

2.9

4.4

3.0

4.5

2.9

4.4

2.9

4.4

VIN = VIH or VIL

IOH = −4 mA

IOH = −8 mA

3.0

4.5

2.58

3.94

2.48

3.80

2.34

3.66

VOL Maximum Low−Level Output

Voltage VIN = VIH or VIL

VIN = VIH or VIL

IOL = 50 mA

3.0

4.5

0.0

0.1

VIN = VIH or VIL

IOL = 4 mA

IOL = 8 mA

3.0

4.5

0.36

0.44

0.52

IIN Maximum Input Leakage

Current

VIN = 5.5 V or GND 0 to

5.5

±0.1 ±1.0 ±1.0 mA

ICC Maximum Quiescent Supply

Current

VIN = VCC or GND 5.5 2.0 20 40 mA

ICCT Quiescent Supply Current Input: VIN = 3.4 V 5.5 1.35 1.50 1.65 mA

IOPD Output Leakage Current VOUT = 5.5 V 0.0 0.5 5.0 10 mA

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)

Symbol Parameter Test Conditions

TA = 25°C TA = − 40 to 125°C

Unit

Min Typ Max Min Max

tPLH,

tPHL

Maximum Propagation Delay,

A or B to Y

VCC = 3.3 ± 0.3 V CL = 15 pF

CL = 50 pF

5.5

8.0

7.9

11.4

1.0

9.5

13.0

VCC = 5.0 ± 0.5 V CL = 15 pF

CL = 50 pF

3.8

5.3

5.5

7.5

1.0

6.5

8.5

Cin Maximum Input Capacitance 4 10 10 pF

CPD Power Dissipation Capacitance (Note 1)

Typical @ 25°C, VCC = 5.0V

1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 4 (per gate). CPD is used to determine the

no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.

Figure 1. Switching Waveforms

CL*

*Includes all probe and jig capacitance

TEST

POINT

DEVICE

UNDER

TEST

OUTPUT

Figure 2. Test Circuit

GND

tPHL

tPLH

1.5V

VOL

VOH

ORDERING INFORMATION

Device Package Shipping†

MC74VHCT32ADR2G SOIC−14

(Pb−Free)

2500 / Tape & Reel

MC74VHCT32ADTR2G TSSOP−14

(Pb−Free)

2500 / Tape & Reel

NLV74VHCT32ADTR2G* TSSOP−14

(Pb−Free)

2500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP

Capable.

i: T h T r! mmmm L %k www.cnsemi.com 5 mmmm Lj DUE Uﬂm owes ‘ DIMENSION‘NG AND toLEmNcwe FER ASME vm SM ‘594 2 conoLst D‘MENS‘ON MLLLLMETERS a DIMENSION n DOES NOT woLqu DAMBAR PROTRUSION ALLOWABLE FROTRUSION SHALL BE 013 IOTAL IN EXCESS 0; AT MAxLMuM MAIERIAL CONDmON 4 DIMENSIONS D AND E DO NOT wcLuDE MOLD womusxows 5 MAxLMuM MOLD Paomusxow n ‘5 PER 5on 4

MC74VHCT32A

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PACKAGE DIMENSIONS

SOIC−14 NB

CASE 751A−03

ISSUE L

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF AT

MAXIMUM MATERIAL CONDITION.

4. DIMENSIONS D AND E DO NOT INCLUDE

MOLD PROTRUSIONS.

5. MAXIMUM MOLD PROTRUSION 0.15 PER

SIDE.

14 8

0.25 B M

X 45

SEATING

PLANE



0.25 B S

13X

DETAIL A

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

D8.55 8.75 0.337 0.344

E3.80 4.00 0.150 0.157

A1.35 1.75 0.054 0.068

b0.35 0.49 0.014 0.019

L0.40 1.25 0.016 0.049

e1.27 BSC 0.050 BSC

A3 0.19 0.25 0.008 0.010

A1 0.10 0.25 0.004 0.010

M0 7 0 7

H5.80 6.20 0.228 0.244

h0.25 0.50 0.010 0.019

 

6.50

14X

0.58

14X

1.18

1.27

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

0.10

j I-QIEE H_E HHHHHHH |:| 7 LW4,,,4,,E 4* :;§: EX E391; HHHHHHH Q D,15(0.006) T U 6) CI L; T? i L Eﬁﬂ Q SE“? 49 L J DETAILE/

MC74VHCT32A

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PACKAGE DIMENSIONS

TSSOP−14

DT SUFFIX

CASE 948G

ISSUE C

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C−−− 1.20 −−− 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.



U0.15 (0.006) T

2X L/2

0.10 (0.004) V S

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

SECTION N−N

DETAIL E

JJ1

DETAIL E

−W−

0.25 (0.010)

PIN 1

IDENT.

U0.15 (0.006) T

−V−

14X REFK

7.06

14X

0.36 14X

1.26

0.65

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT

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