Kintex-7 FPGAs Brief Datasheet by AMD

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INDUSTRY’S BEST PRICEPERFORMANCE
FPGAS WITH LOWER POWER
Industry’s Best Price-Performance
With the introduction of the world’s first 28nm FPGAs, Xilinx gives designers the broadest range of
programmable platforms including the versatility of a new class of devices. Doubling the price-
performance and cutting power consumption and cost in half makes the Xilinx Kintex™-7 FPGAs
the clear choice for today’s fast-growth applications such as wireless communications. Designers
can take advantage of a family of devices with exceptional performance and connectivity, at price
points previously limited to only the highest-volume applications.
Highly Integrated, High-Speed Connectivity
Kintex-7 FPGAs let designers build in superior bandwidth and 12-bit digitally programmable analog
while meeting cost and power requirements. Unprecedented 144GMACS digital signal processor
(DSP) power makes the versatile Kintex-7 devices an excellent option for applications such as
portable ultrasound equipment and next-generation communications. Kintex-7 FPGAs deliver peak
serial bandwidth (full duplex) of 800Gbps and include CPRI/OBSAI IP cores (9.8Gbps) optimized
for today’s distributed baseband architectures. The programmable Kintex-7 devices can also be
easily reconfigured to support multiple air interfaces such as LTE, WiMAX, and WCDMA. For
interfacing to host systems, the Kintex-7 FPGA family provides built-in support for eight-channels of
PCI Express (Gen1/Gen2).
The highly efficient and affordable devices also enable designers to address connectivity and
throughput requirements while minimizing part counts. The 72-bit, 1,833Mbps Kintex-7 memory
interface supports single-memory-buffer designs instead of the two- or four-buffer designs required
with other devices. Similarly, a single Kintex-7 device can process video at rates that enable a
single-chip implementation of a video over IP gateway that can support 12 3G channels over a
4-channel 10 Gigabit Ethernet bridge.
The Strength of a Unified Architecture
All 7 series FPGA families leverage the Xilinx unified architecture to protect IP investments and
make it easy to migrate 6 series designs. With common elements including logic fabric, Block RAM,
DSP, clocking, Analog Mixed Signal (AMS), and more, the unified architecture also facilitates rapid
retargeting within the 7 series. For migrations and new projects alike, the Kintex-7 architecture
dramatically reduces development times and lets designers focus on product differentiation.
Market Challenges
• Stringent demands for higher performance
• Power is also paramount (as much as 40% of
operating expenses)
• System complexity calls for more highly
integrated silicon devices
• Only highly differentiated products can stand out
in today’s market
• Increasing competition requires lowering costs
• Pressures to speed time to production make
ASSPs and ASICs less practical
The Solution: Xilinx Kintex-7
FPGAs
• A new class of device, with twice the price-
performance at a lower price point
• 28nm high- metal gate (HKMG) process
technology and a High-Performance, Low-
Power (HPL) approach that drive up power
efficiency
• A balanced design, optimized and packaged for
performance, power, cost, and time to market for
high-growth applications
• The flexibility and time-savings of
programmability and Targeted Design Platforms,
for lower development time and costs
• Unified architecture with AMBA® Advanced
extensible Interface 4 (AXI4) for plug-and-play IP
that facilitates reuse and portability
• Part of the industry’s most versatile series for
fast, easy retargeting to higher-density or lower-
cost devices
KINTEX7 FPGASFPGA FAMILY
INTRODUCING A NEW CLASS OF FPGAS:
AN IDEAL BALANCE OF INTEGRATION,
PRICE, PERFORMANCE, AND POWER

DOMAIN IP, DOMAIN TOOLS, FMC DAUGHTER CARDS
®
BASE IP, ISE® DESIGN SUITE, BASE BOARDS
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KINTEX7 FPGASFPGA FAMILY
Key Capabilities Overview
Twice the Price-Performance, Lower Cost
• Many performance-boosting innovations including industry-leading
1,866Mbps memory interface; 639MHz DSP48E1 slices with high-
performance filtering capabilities; six-input look-up table
• 1833Mbps memory interfaces
• LVDS connectivity at 1.6G
• Up to 1,920 DSP slices
• Package optimized to line rate performance
Memory Controller Innovations
• Dedicated hard IP implementation of the memory Phy, for simplified
interfacing to external DDR memory
• A flexible, soft controller enabled by high-performance logic for calibration,
access methods, and system interfaces
• High-speed PCI Express hard and soft IP
• Integrated hard IP for PCI Express, with full support for PCI Express
endpoint and root port configurations
• Hard IP support for up to eight PCI Express Gen1 and Gen2 channels
• Soft IP support for up to eight PCI Express Gen3 channels
Maximize Connectivity and Stay Within Budget
• Kintex-7 FPGAs let designers choose a package with the right
combination of price and performance for the application
• Family price points each maximize throughput (6.6Gbps and 12.5Gbps
transceivers)
• Maximize performance with regular flip-chip BGA packaging offering
highest signal integrity and up to 32 high-speed GTX transceivers
(12.5Gbps line rates)
• Minimize costs with bare-die flip-chip BGA packaging that delivers high
signal integrity and robust thermal characteristics (up to 6.6Gbps line
rates)
Half the Power Consumption
• HPL process cuts power in half compared to alternative 28nm High-
Performance (HP) process
• Low 1.0V core voltage (optional 0.9V core voltage option for some
devices) translates into lower system power, lower cooling required, and
more “green” designs
• Additional power reductions from intelligent clock gating and fifth-
generation partial reconfiguration
Maximizing Productivity with Targeted Design Platforms
Xilinx Targeted Design Platforms are the industry’s most comprehensive development kits, complete with boards, tools, IP cores, reference designs and
FPGA Mezzanine Card (FMC) support. The kits enable designers to begin application development immediately and boost productivity while accelerating
access to advanced functionality with pre-verified reference designs. Combined with a full-featured evaluation board and Xilinx ISE Design Suite
software, the reference designs also facilitate the integration of solutions from an ecosystem of readily available third-party add-on hardware and IP.
Our base kit, the Kintex-7 FPGA KC705 Evaluation Kit, provides a flexible framework for designing higher-level systems that require DDR3, Gigabit
Ethernet, PCI Express, and other serial connectivity. Our first domain kit, the Kintex-7 FPGA DSP Kit , includes an integrated high-speed analog FPGA
mezzanine card (FMC) to interface to real-world signals.
FOCUS ON DIFFERENTIATION
KINTEX7 FPGASFPGA FAMILY
Kintex-7 FPGAs offer the best price-performance so designers can meet stringent latency requirements for LTE baseband processing in a common platform.
• Programmability enables a cost-effective common platform supporting multiple air interfaces such as LTE, WiMAX, and WCDMA
• Reduce total cost of ownership with the ability to scale and reuse designs from picocell to macrocell
• 3x capacity at the same cost of previous-generation FPGAs while consuming 40% less power
• Support for 9.8Gbps CPRI/OBSAI for high throughput
• Support for 6.144Gbps CPRI/OBSAI in a low-cost package option
Support for 6.144Gbps CPRI/OBSAI in a low-cost package optionHigh I/O bandwidth and 144GMACS DSP processing power in chip-scale packaging
make the Kintex-7 70T FPGA highly effective for both front- and back-end ultrasound processing. Designers can deploy a fully programmable 128-channel
ultrasound implementation that scales up to 196 or 256 channels for high-end cart solutions or down to 64 or 32 channels for hand-held solutions.
• 128-channel implementation in a modular set of five Kintex-7 70T FPGAs offers 44% lower power, 45% lower cost, and 57% smaller form factor
compared to previous-generation FPGAs
• Kintex-7 70T FPGAs offer 144GMACS from 240 DSP slices (288GMACS for symmetric filters)
• Built-in support for eight PCI Express Gen1/Gen2 channels enables high-bandwidth interface to host system
• Chip-scale packaging for small form factor
Network
Processor
(eg Winpath-3)
Kintex-7 FPGA
32 bit, 533MHz
64MB
DDR3
64MB
DDR3
System Control
MAC
Acceleration
Channel
Encoding
QAM
Mod MIMO OFDM
Channel
Decoding
QAM
Demod MIMO OFDM
Downlink
Uplink
Layer 1
L1/L2 Interface
OBSAI/CPRI Interface
Layer 2/3
System configuration: 20MHz, 4x4 (MU-MIMO), FDD
DL/UL HARQ
Buffer, MB
Sub-frame
Buffer
GTX
GTX
Digital
Front
End
GTX
GTX
GbE/
PCIe
Control
Data
ECG Sync
RX 64 Beamformed Channels
FGG484 23mm x 23mm Artix-7 XC7A100T
RX 64 Beamformed Channels
FGG484 23mm x 23mm Artix-7 XC7A100T
16 BIT DAC
TX/RX
ADC 128
Channels
Deserializer
800 Slices
Doppler
1250 Slices, 8 DSP48, 8 BRAM
Head Control
400 Slices, 4 DSP48, 4 BRAM
TX Beamformer + TGA
1600 Slices
4 DSP48
4 BRAM
24 I/O
RX Handler
800 Slices
4DSP48
4 BRAM
PCIe
Control
1800 Slices
8 DSP48
4 BRAM
Q/I
Motor
Driver
Kintex7 XC7K70T FPGA
FBG484 23MM X 23MM
Ultrasound
128 Channels
Transducer
Optical Encoder for
Position Feedback
Motor for 3D
Head Movement
128 Differential
Channels as
ADC and
Control Signals
COMMUNICATIONS: SINGLECHIP LTE BASEBAND 2 X 4 MIMO
MEDICAL: PORTABLE ULTRASOUND
Enabling Next-Generation Systems
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KINTEX7 FPGASFPGA FAMILY
Take the NEXT STEP
Download the latest version of ISE Design Suite tools: www.xilinx.com/ise
For more information visit: www.xilinx.com/kintex7
Kintex-7 FPGAs enable cost-effective, low-power bridging of the serial digital interface (SDI) protocol onto IP technology for long-distance WAN
transport to link local studios/live events, broadcast facilities, and satellite uplink stations using standard IP networks.
• Reduce power by 64% and reduce cost by 85% with a single XC7K160T FPGA implementation of a 12x 3G-SDI over 4x10GbE bridge
compared to the equivalent function implemented in two Virtex-6 XC6L130T devices
• Reduce cost further with high-bandwidth interfaces that shrink BOM: 72-bit x 1,600Mbps DDR3 memory interface capability enables a single
memory buffer that would require two or four memory buffers in previous-generation FPGAs
Kintex-7 FPGA
SFP+
or
XFP
10Gbps
10GbE
SFP+
or
XFP
10Gbps
10GbE
SFP+
or
XFP
10Gbps
10GbE
*Bi-directional supported by additional cable drivers
SFP+
or
XFP
10Gbps
10GbE
GTX
GTX
GTX
GTX
SMPTE
2022
Bridge
10GE
MAC/PHY
SMPTE
2022
Bridge
10GE
MAC/PHY
SMPTE
2022
Bridge
10GE
MAC/PHY
SMPTE
2022
Bridge
10GE
MAC/PHY
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
Cable Eq*
GTX
GTX
GTX
GTX
GTX
GTX
GTX
GTX
GTX
GTX
GTX
GTX
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
SD/HD/3G-SDI In 2.97Gbps
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